The present invention generally relates to semiconductor chip fabrication. More particularly, the present invention relates to a center bond flip chip semiconductor carrier and a method for making and using it to produce a semiconductor device.
Semiconductor device packaging techniques are well known. In some conventional packaged devices, a die is attached to a carrier, and contacts of each are electrically connected. In one such packaged device called a flip-chip device, a semiconductor chip is flipped and bonded with a carrier such that contacts of the die face and bond to contacts of the carrier.
With reference to FIGS. 1-3, a conventional center bond flip chip device 10 is shown as including a flipped die 30 and a carrier 11. The carrier 11 has a flexible substrate 12 and an elastomeric cover material 14. The elastomeric material 14 may be formed of a silicone or a silicone-modified epoxy. The elastomeric material 14 includes a first portion 15 and a second portion 17 of generally equal size. The flexible substrate 12 is formed of a material exhibiting high temperature stability as well as high mechanical rigidity. The substrate 12 may be a flexible tape, such as, for example, a polyimide tape. Two commercially available polyimide tapes, KAPTON(copyright) from E. I. DuPont Nemours and Company and UPILEX(copyright) from Ube Industries, Ltd., can be used to form the substrate 12.
Conductive traces 16a, 16b, 16c are formed on the flexible substrate 12 and positioned below the elastomeric material 14. The traces 16a, 16b, 16c may be deposited on the flexible substrate 12 in a variety of ways, the most preferred method being electrolytic deposition. Other suitable methods include sputter coating and laminating a sheet of conductive material and etching away excess material to form the traces.
A gap 20 separates the two portions 15, 17 of the elastomeric material 14. Conductive lands 18a, 18b, 18c are positioned on, respectively, the conductive traces 16a, 16b, 16c within the gap 20. The die 30 has been removed from the FIG. 1 for clarity of illustration of the lands 18a, 18b, 18c. As illustrated, the gap 20 is rectangularly shaped, although any configured gap will suffice as long as the conductive pads 18a, 18b, 18c are not covered by the elastomeric material 14.
A die 30 is positioned on the elastomeric material 14 of the carrier 11. The carrier 11 is electrically connected with the die 30 by way of suitable conductive connecting structures, such as, for example, inner lead solder balls or bumps 19a, 19b, 19c positioned on, respectively, the conductive pads or lands 18a, 18b, 18c. Conductive vias 22a, 22b, 22c respectively extend from each of the underside surfaces of the traces 16a, 16b, 16c. Outer lead solder balls or bumps 24a, 24b, 24c, or other conductive connecting structures, are located in electrical connection with each respective via 22a, 22b, 22c and serve to connect the traces 16a, 16b, 16c to a structure or common base for mounting components, such as, for example, a printed circuit board 35. Preferably, the outer lead balls 24a, 24b, 24c are about 16 mils in diameter.
Conventional center bond flip chip semiconductor devices have several disadvantages, particularly as die 30 sizes decrease and the contacts thereof are positioned closer together. One disadvantage is that adjacent traces 16a, 16b, 16c of the carrier 11 and their associated conductive lands 18a, 18b, 18c must likewise be positioned closer together to such an extent that the inner lead balls 19a, 19b, 19c will occasionally contact one another, thereby shorting out the semiconductor device. Another disadvantage is that in positioning the inner lead balls 19a, 19b, 19c on the conductive lands 18a, 18b, 18c, wicking of the solder balls onto the conductive traces may sometimes occur during the solder process, providing less of a solder ball surface to make good electrical contact between the die 30 bond pad and a conductive land 18 of the carrier 11.
There is, therefore, a need for a center bond flip chip semiconductor device design which alleviates to some extent these disadvantages.
The present invention provides a carrier for a semiconductor device which includes a substrate, at least one conductive trace located on the substrate, the trace including a recessed seat sized and configured to receive a conductive connecting structure, for example, a solder ball, and an elastomeric covering material, the material including a gap in which the conductive connecting structure may be located in the recessed seat to provide a reliable electrical connection of the trace with a flipped semiconductor die.
The present invention further provides a semiconductor device including a semiconductor die electrically connected to a carrier. The carrier includes at least one conductive trace located on a substrate. The trace includes a recessed seat sized and configured to receive a conductive connecting structure to allow electrical connection of the trace with the semiconductor die.
The present invention further provides an electronic system which includes a semiconductor die, a carrier and a structure for mounting the carrier. The carrier has a substrate, a plurality of conductive traces located on the substrate, and an elastomeric covering material. Each trace includes a recessed seat having a cut out portion sized and configured to receive a conductive connecting structure. The elastomeric material includes a gap corresponding to the location of the recessed seats to allow electrical connection of the traces with the semiconductor die.
The present invention further provides a method for making a carrier for a semiconductor die. The method includes locating at least one conductive trace on a substrate, and creating a recessed seated portion on the trace, which recessed seated portion can be used to seat a conductive connecting structure used for interconnecting the carrier to a semiconductor die.
The present invention further provides a method of making a semiconductor device. The method includes forming a carrier and electrically connecting the carrier with a semiconductor die. The forming includes locating at least one conductive trace on a substrate, creating a recessed seated portion on the trace, and affixing a conductive connecting structure which is coupled to the semiconductor die to the recessed seated portion.
The foregoing and other advantages and features of the invention will be more readily understood from the following detailed description of the invention, which is provided in connection with the accompanying drawings.